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74HC595D.118 参数 Datasheet PDF下载

74HC595D.118图片预览
型号: 74HC595D.118
PDF下载: 下载PDF文件 查看货源
内容描述: 8位串行输入,串行或并行输出移位寄存器与输出锁存器;三态 [8-bit serial-in, serial or parallel-out shift register with output latches; 3-state]
分类和应用: 移位寄存器锁存器
文件页数/大小: 24 页 / 374 K
品牌: NXP [ NXP ]
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74HC595; 74HCT595  
NXP Semiconductors  
8-bit serial-in, serial or parallel-out shift register with output latches;  
3-state  
Table 7.  
Dynamic characteristics …continued  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 14.  
Symbol Parameter Conditions 25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ[1] Max Min  
Max  
Min  
Max  
trec  
recovery  
time  
MR to SHCP; see Figure 12  
10  
30  
-
7  
52  
-
-
-
13  
24  
-
-
15  
-
ns  
fmax  
CPD  
maximum  
frequency  
SHCP and STCP;  
see Figure 9 and 10  
-
-
20  
-
-
-
MHz  
pF  
[6]  
[7]  
power  
dissipation  
capacitance  
fi = 1 MHz; VI = GND to VCC  
130  
[1] Typical values are measured at nominal supply voltage.  
[2]  
t
pd is the same as tPHL and tPLH  
.
[3] tpd is the same as tPHL only.  
[4] ten is the same as tPZL and tPZH  
.
[5]  
tdis is the same as tPLZ and tPHZ.  
[6] CPD is used to determine the dynamic power dissipation (PD in W).  
PD = CPD VCC2 fi + (CL VCC2 fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
(CL VCC2 fo) = sum of outputs;  
CL = output load capacitance in pF;  
VCC = supply voltage in V.  
[7] All 9 outputs switching.  
12. Waveforms  
1/f  
max  
V
I
SHCP input  
GND  
V
M
t
t
W
t
PHL  
PLH  
V
OH  
V
Q7S output  
M
V
OL  
mna557  
Measurement points are given in Table 8.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig 9. Shift clock pulse, maximum frequency and input to output propagation delays  
74HC_HCT595  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 12 December 2011  
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