Philips Semiconductors
Product specification
Octal D-type transparent latch; 3-state
AC WAVEFORMS
74HC/HCT573
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.6
Waveforms showing the data input (D
n
) to
output (Q
n
) propagation delays and the
output transition times.
Fig.7
Waveforms showing the latch enable input
(LE) pulse width, the latch enable input to
output (Q
n
) propagation delays and the
output transition times.
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.9
Waveforms showing the data set-up and
hold times for D
n
input to LE input.
(1) HC : V
M
= 50%; V
I
= GND to V
CC
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”.
Fig.8
Waveforms showing the 3-state enable and
disable times.
December 1990
7