Philips Semiconductors
Product specification
Programmable divide-by-n counter
PIN DESCRIPTION
PIN NO.
1
2
3, 4, 5, 6, 22, 21, 20, 19, 18, 17, 16, 15, 10, 9, 8, 7
12
14, 13, 11
23
24
SYMBOL NAME AND FUNCTION
CP
LE
J
1
to J
16
GND
K
a
to K
c
Q
V
CC
74HC/HCT4059
clock input (LOW-to-HIGH, edge-triggered)
latch enable (active HIGH)
programmable JAM inputs (BCD)
ground (0 V)
mode select inputs
divide-by-n output
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
1998 Jul 08
5