74HC4052; 74HCT4052
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer
6. Pinning information
6.1 Pinning
74HC4052
74HCT4052
74HC4052
74HCT4052
terminal 1
index area
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
2Y0
2Y2
2Z
V
CC
1Y2
1Y1
1Z
2
3
4
5
6
7
15
14
13
12
11
10
2Y2
2Z
1Y2
1Y1
1Z
2Y3
2Y1
E
2Y3
2Y1
E
1Y0
1Y3
S0
1Y0
1Y3
S0
(1)
CC
V
V
EE
V
EE
GND
S1
001aah823
001aah822
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
supply pin or input.
Fig 5. Pin configuration for DIP16, SO16 and
(T)SSOP16
Fig 6. Pin configuration for DHVQFN16
6.2 Pin description
Table 2.
Symbol
2Y0
2Y2
2Z
Pin description
Pin
1
Description
independent input or output 2Y0
independent input or output 2Y2
common input or output 2
independent input or output 2Y3
independent input or output 2Y1
enable input (active LOW)
negative supply voltage
2
3
2Y3
2Y1
E
4
5
6
VEE
GND
S1
7
8
ground (0 V)
9
select logic input 1
S0
10
11
12
13
14
15
16
select logic input 0
1Y3
1Y0
1Z
independent input or output 1Y3
independent input or output 1Y0
common input or output 1
independent input or output 1Y1
independent input or output 1Y2
positive supply voltage
1Y1
1Y2
VCC
74HC_HCT4052
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 10 — 19 July 2012
5 of 29
NXP [ NXP ]
