NXP Semiconductors
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
5. Pinning information
5.1 Pinning
74HC373
74HCT373
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
6
7
8
9
20 V
CC
19 Q7
Q0
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 LE
001aae046
74HC373
74HCT373
terminal 1
index area
2
3
4
5
6
7
8
9
GND 10
LE 11
GND
(1)
20 V
CC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
OE
1
D0
D1
Q1
Q2
D2
D3
Q3
GND 10
001aae047
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
supply pin or input.
Fig 6.
Pin configuration DIP20, SO20, SSOP20 and
TSSOP20
Fig 7.
Pin configuration DHVQFN20
5.2 Pin description
Table 2.
Symbol
OE
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7
D0, D1, D2, D3, D4, D5, D6, D7
GND
LE
V
CC
Pin description
Pin
1
2, 5, 6, 9, 12, 15, 16, 19
3, 4, 7, 8, 13, 14, 17, 18
10
11
20
Description
3-state output enable input (active LOW)
3-state latch output
data input
ground (0 V)
latch enable input (active HIGH)
supply voltage
74HC_HCT373
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 13 December 2011
4 of 26
PHILIPS [ NXP SEMICONDUCTORS ]
