74HC32; 74HCT32
NXP Semiconductors
Quad 2-input OR gate
13. Abbreviations
Table 10. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
LSTTL
MM
Low-power Schottky Transistor-Transistor Logic
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 11. Revision history
Document ID
74HC_HCT32 v.5
Modifications:
Release date
20120904
Data sheet status
Change notice
Supersedes
Product data sheet
-
74HC_HCT32 v.4
• The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
74HC_HCT32 v.4
74HC_HCT32 v.3
20031212
Product specification
Product specification
Product specification
-
-
-
74HC_HCT32 v.3
20030829
74HC_HCT32_CNV v.2
-
74HC_HCT32_CNV v.2 19970827
74HC_HCT32
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5 — 4 September 2012
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