NXP Semiconductors
74HC04-Q100; 74HCT04-Q100
Hex inverter
5. Pinning information
+&4
+&74
+&4
+&74
$
<
$
<
$
<
*1'
DDD
WHUPLQDO
LQGH[ DUHD
<
9
&&
$
<
$
<
$
<
DDD
9
&&
$
<
$
<
$
<
$
<
$
<
7UDQVSDUHQW WRS YLHZ
(1) The die substrate is attached to the exposed die pad
using conductive die attach material. It cannot be used
as a supply pin or input.
Fig 4.
Pin configuration DIP14, SO14 and (T)SSOP14
Fig 5.
Pin configuration DHVQFN14
5.1 Pin description
Table 2.
Symbol
1A
1Y
2A
2Y
3A
3Y
GND
4Y
4A
5Y
5A
6Y
6A
V
CC
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
data input
data output
data input
data output
data input
data output
ground (0 V)
data output
data input
data output
data input
data output
data input
supply voltage
74HC_HCT04_Q100
All information provided in this document is subject to legal disclaimers.
*1'
*1'
$
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 10 April 2013
3 of 16