Philips Semiconductors
Product specification
Quad 2-input NAND gate
APPLICATION INFORMATION
74HC/HCT03
(1) R
ON(max)
= 0.26 V / 4 mA = 65
Ω
(at 25
°C)
(a)
(b)
Fig.9 Pull-up configuration.
(1)
(2)
(3)
(4)
V
CC
(R) = 2.0 V; V
IL
= 0.5 V.
V
CC
(R) = 5.0 V; V
IL
= 0.8 V.
V
CC
(R) = 4.5 V; V
IL
= 1.35 V.
V
CC
(R) = 6.0 V; V
IL
= 1.8 V.
Fig.10 Minimum resistive load as a function of the pull-up voltage.
Notes to Figs
9
and 10
If V
P
−
V
CC
(R)
>
0.5 V a positive current will flow into the receiver (as described in the
“USER GUIDE”;
input/output
protection), this will not affect the receiver provided the current does not exceed 20 mA. At V
CC
<
4.5 V, R
ON (max)
is not
guaranteed; R
ON(max)
can be estimated using Figs 33 and 34 in the
“USER GUIDE”.
Note to Application information
All values given are typical unless otherwise specified.
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
8
PHILIPS [ NXP SEMICONDUCTORS ]
