NXP Semiconductors
74HC00; 74HCT00
Quad 2-input NAND gate
13. Abbreviations
Table 10.
Acronym
CMOS
DUT
ESD
HBM
LSTTL
MM
TTL
Abbreviations
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Low-power Schottky Transistor-Transistor Logic
Machine Model
Transistor-Transistor Logic
14. Revision history
Table 11.
Revision history
Release date
20111214
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Product specification
Change notice
-
-
-
-
-
Supersedes
74HC_HCT00 v.5
74HC_HCT00 v.4
74HC_HCT00 v.3
74HC_HCT00_CNV v.2
-
Document ID
74HC_HCT00 v.6
Modifications:
74HC_HCT00 v.5
74HC_HCT00 v.4
74HC_HCT00 v.3
•
Legal pages updated.
20101125
20100111
20030630
74HC_HCT00_CNV v.2 19970826
74HC_HCT00
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6 — 14 December 2011
13 of 16
PHILIPS [ NXP SEMICONDUCTORS ]
