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10020EV8-4F 参数 Datasheet PDF下载

10020EV8-4F图片预览
型号: 10020EV8-4F
PDF下载: 下载PDF文件 查看货源
内容描述: ECL可编程阵列逻辑 [ECL programmable array logic]
分类和应用: 可编程逻辑输入元件时钟
文件页数/大小: 17 页 / 272 K
品牌: NXP [ NXP ]
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Philips Semiconductors Programmable Logic Devices  
Product specification  
ECL programmable array logic  
10H20EV8/10020EV8  
FUNCTIONAL DIAGRAM  
CLK/I  
I
1
11  
PROGRAMMABLE AND ARRAY  
(90 × 40)  
12  
12  
8
8
8
8
12  
12  
OUTPUT  
LOGIC  
MACROCELL  
OUTPUT  
LOGIC  
MACROCELL  
OUTPUT  
LOGIC  
MACROCELL  
OUTPUT  
LOGIC  
MACROCELL  
OUTPUT  
LOGIC  
MACROCELL  
OUTPUT  
LOGIC  
MACROCELL  
OUTPUT  
LOGIC  
MACROCELL  
OUTPUT  
LOGIC  
MACROCELL  
RESET  
PRESET  
F
F
F
F
F
F
F
F
As can be seen in the Logic Diagram, the  
device is a two-level logic element with a  
programmable AND array. The 20EV8 can  
have up to 20 inputs and 8 outputs. Each  
output has a versatile Macrocell whereby the  
output can either be configured as a  
dedicated input, a dedicated combinatorial  
output with polarity control, a bidirectional I/O,  
or as a registered output that has both output  
polarity control and feedback into the AND  
array.  
The device also features 90 product terms.  
Two of the product terms can be used for a  
global asynchronous preset and/or reset.  
Eight of the product terms can be used for  
individual output enable control of each  
Macrocell. The other 80 product terms are  
distributed among the outputs. Four of the  
outputs have eight product terms, while the  
other four have 12. This arrangement allows  
the utmost in flexibility when implementing  
user patterns.  
FUNCTIONAL DESCRIPTION  
The 10H20EV8/10020EV8 is an ultra  
high-speed universal ECL PAL-type device.  
Combining versatile Output Macrocells with a  
standard AND/OR single programmable  
array, this device is ideal in implementing a  
user’s custom logic.  
Output Logic Macrocell  
The 10H20EV8/10020EV8 incorporates an  
extremely versatile Output Logic Macrocell  
that allows the user complete flexibility when  
configuring outputs.  
F
n
AP  
As seen in Figure 1, the 10H20EV8/  
OUTPUT  
SELECT  
MUX  
D
Q
Q
10020EV8 Output Logic Macrocell consists of  
an edge-triggered D-type flip-flop, an output  
select MUX, and a feedback select MUX.  
S
S
0
CLK  
1
V
CC  
Fuses S and S allow the user to select  
0
1
AR  
between the various cells. S controls  
1
whether the output will be either registered  
with internal feedback or combinatorial I/O.  
FEEDBACK  
MUX  
S controls the polarity of the output (Active-  
HIGH or Active-LOW). This allows the user to  
achieve the following configurations:  
0
S
1
V
CC  
Registered Active-HIGH output, Registered  
Active-LOW output, Combinatorial Active-  
HIGH output, and Combinatorial Active-LOW  
output. With the output enable product term,  
this list can be extended by adding the  
configurations of a Combinatorial I/O with  
Polarity or another input.  
Figure 1. Output Logic Macrocell  
115  
October 22, 1993