PE43702
Product Specification
Table 5. Control Voltage
Table 9. Serial Attenuation Word Truth Table
State
Bias Condition
Attenuation Word
Attenuation
Setting
RF1-RF2
0 to +1.0 Vdc at 2 µA (typ)
Low
D0
(LSB)
D6
D7
D5
D4
D3
D2
D1
+2.6 to +5 Vdc at 10 µA (typ)
High
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
H
H
L
L
L
L
L
L
H
L
H
L
L
L
L
L
H
L
L
H
L
L
L
L
H
L
L
L
H
L
L
L
H
L
L
L
L
H
L
L
H
L
L
L
L
L
H
L
H
L
L
L
L
L
L
H
Reference I.L.
0.25 dB
0.5 dB
1 dB
Table 6. Latch and Clock Specifications
Shift Clock
Latch Enable
Function
2 dB
0
↑
Shift Register Clocked
4 dB
Contents of shift register
transferred to attenuator core
↑
X
8 dB
16 dB
Table 7. Parallel Truth Table
31.75 dB
Parallel Control Setting
Attenuation
Setting
RF1-RF2
D6
D5
D4
D3
D2
D1
D0
L
L
L
L
L
L
L
H
H
L
L
L
L
L
L
H
L
H
L
L
L
L
L
H
L
L
H
L
L
L
L
H
L
L
L
H
L
L
L
H
L
L
L
L
H
L
L
H
L
L
L
L
L
H
L
H
L
L
L
L
L
L
H
Reference I.L.
0.25 dB
0.5 dB
1 dB
2 dB
4 dB
8 dB
16 dB
31.75 dB
Table 8. Serial Register Map
MSB (last in)
LSB (first in)
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
Bits can either be set to logic high or logic low
D7
D6
D5
D4
D3
D2
D1
D0
Attenuation Word
Attenuation Word is derived directly from the attenuation value. For example, to program the 12.5 dB state:
Attenuation Word: Multiply by 4 and convert to binary → 4 * 12.5 dB → 50 → X0110010
Serial Input: X0110010
Document No. 70-0244-03 │ www.psemi.com
©2008-2009 Peregrine Semiconductor Corp. All rights reserved.
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