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9701-00 参数 Datasheet PDF下载

9701-00图片预览
型号: 9701-00
PDF下载: 下载PDF文件 查看货源
内容描述: 3000兆赫的UltraCMOS ?整数N分频PLL抗辐射的空间应用 [3000 MHz UltraCMOS⑩ Integer-N PLL Rad Hard for Space Applications]
分类和应用:
文件页数/大小: 13 页 / 280 K
品牌: PEREGRINE [ PEREGRINE SEMICONDUCTOR CORP. ]
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PE9701
Product Specification
Functional Description
The
PE9701
consists of a prescaler, counters, a
phase detector, a charge pump, and control logic.
The dual modulus prescaler divides the VCO
frequency by either 10 or 11, depending on the
value of the modulus select. Counters “R” and
“M” divide the reference and prescaler output,
respectively, by integer values stored in a 20-bit
register. An additional counter (“A”) is used in the
modulus select logic. The phase-frequency
detector generates up and down frequency control
signals. The control logic includes a selectable
chip interface. Data can be written via serial bus,
parallel bus, or hardwired directly to the pins.
There are also various operational and test modes
and a lock detect output.
Figure 4. Functional Block Diagram
f
r
R Counter
(6-bit)
f
c
D(7:0)
Sdata
Control
Pins
Control
Logic
R(5:0)
M(8:0)
A(3:0)
PD_U
Phase
Detector
PD_D
Charge
Pump
CP
LD
Cext
2 kΩ
Modulus
Select
F
in
F
in
10/11
Prescaler
M Counter
(9-bit)
f
p
Document No. 70-0035-02
www.psemi.com
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
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