PE9308
Advance Information
Evaluation Kit
The Ceramic SOIC Prescaler Evaluation Board
was designed to help customers evaluate the
PE9308 divide-by-4 prescaler. On this board, the
device input (pin 3) is connected to the SMA
connector J2 through a 50
Ω
transmission line.
The device output (pin 6) is connected to SMA
connector J3 through a 50
Ω
transmission line.
J1 provides DC power to the device via pin
1,2,4,5,7,8.Multiple decoupling capacitors
(C4,5,8,9=10pF, C3,6,7,10=0.01uF) are used. It is
the responsibility of the customer to determine
proper supply decoupling for their design
application. The board is constructed using 4
layers. The top and bottom layers are comprised
of Rogers low loss 4350 material having a core
thickness of 0.010"; while the internal layers are
comprised of FR-4. The overall board thickness is
0.062".
Applications Support
If you have a problem with your evaluation kit or if
you have applications questions call (858) 731-
9400 and ask for applications support. You may
also contact us by fax or e-mail:
Fax:
(858) 731-9499
E-Mail:
help@psemi.com
Figure 8. Evaluation Board Layouts
Peregrine Specification 101/0186
Figure 9. Evaluation Board Schematic
Peregrine Specification 102/0247
Document No. 70-0187-01
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©2005 Peregrine Semiconductor Corp. All rights reserved.
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