PE4274
Preliminary Specification
Evaluation Kit
The SPDT Switch Evaluation Kit facilitates
customer evaluation of the PE4274 SPDT switch.
The RF common port is connected through a 75
Ω
transmission line to J2. Ports 1 and 2 are
connected through 75
Ω
transmission lines to J1
and J3. A through line connects F connectors J4
and J5. This transmission line can be used to
estimate the PCB loss over the environmental
conditions. J6 provides DC and digital inputs to
the device.
The board is composed of a four metal layer FR4
material with a total thickness of 0.062”. The
transmission lines are hybrid microstrip/coplanar
waveguide with ground plane (28 mil core, 21 mil
width, 30 mil gap).
The provided jumpers short the control pins to
ground for logic low. With the jumper removed the
control input rises to V
DD
for logic high through the
1 MΩ pull up resistor. These resistors will draw
several microamps from V
DD.
They are not
required for normal operation.
Figure 14. Evaluation Board Layouts
Figure 15. Evaluation Board Schematic
Vdd
Vdd
J4
J5
1M
1M
J6-1
J6-5
J6-9
J6-13
GND
VDD
GND
GND
VSS/
GND
C1
C2
GND
GND
J1
RF1
GND
GND
PE4274
MLPQ 20-Lead
4x4 mm
RF2
GND
GND
J3
GND
GND
GND
J2
Peregrine Semiconductor Corp. ®
│
http://www.psemi.com
Copyright © Peregrine Semiconductor Corp. 2005
Page 9 of 12
GND
RFC
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