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4268 参数 Datasheet PDF下载

4268图片预览
型号: 4268
PDF下载: 下载PDF文件 查看货源
内容描述: SP6T UltraCMOS⑩ 2.6 V开关100 - 3000兆赫 [SP6T UltraCMOS? 2.6 V Switch 100 - 3000 MHz]
分类和应用: 开关
文件页数/大小: 11 页 / 307 K
品牌: PEREGRINE [ PEREGRINE SEMICONDUCTOR CORP. ]
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PE4268
Product Specification
Figure 3. Pin Configuration (Top View)
GND
GND
GND
GND
ANT
Table 4. Absolute Maximum Ratings
Symbol
V
DD
V
I
Parameter/Conditions
Power supply voltage
Voltage on any input
Storage temperature range
Operating temperature range
TX input power (50
Ω)
P
IN
RX input power (50
Ω)
ESD Voltage (HBM,
MIL_STD 883 Method
3015.7)
V
ESD1
ESD Voltage (MM, JEDEC,
JESD22-A114-B)
ESD Voltage (CDM, JEDEC,
JESD22-C101-A)
+23
Min
-0.3
-0.3
-65
-40
Max
4.0
V
DD
+
0.3
+150
+85
+38
dBm
Units
V
V
°C
°C
20
19
18
17
TX1
GND
TX2
GND
GND
16
1
2
3
4
5
10
15
RX1
RX2
GND
RX3
RX4
T
ST
T
OP
20-lead QFN
4x4mm
Exposed Solder Pad
14
13
12
11
6
7
8
9
GND
V
DD
V3
V2
V1
1500
100
2000
V
V
V
Table 2. Pin Descriptions
Pin No.
1
1
2
3
1
4
5
6
7
8
9
10
11
1
12
1
Pin Name
TX1
GND
TX2
GND
GND
VDD
V3
V2
V1
GND
RX4
RX3
GND
RX2
RX1
GND
GND
GND
ANT
GND
RF I/O - TX1
Ground
RF I/O – TX2
Ground
Ground
Supply
Description
Note 1: ANT port rated higher per applications section, see page 4.
Switch control input, CMOS logic level
Switch control input, CMOS logic level
Switch control input, CMOS logic level
Ground
RF I/O - RX4
RF I/O - RX3
Ground
RF I/O - RX2
RF I/O - RX1
Ground
Ground
Ground
RF Common – Antenna Input
Ground
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 4.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 5. Truth Table
Path
ANT – RX1
13
14
1
15
1
16
17
18
19
1
20
Note 1:
Blocking capacitors needed only when connected to an
external non-zero DC voltage.
Table 3. DC Electrical Specifications
Parameter
V
DD
Supply Voltage
I
DD
Power Supply Current
(V
DD
= 2.6V)
Control Voltage High
Control Voltage Low
0.7 x V
DD
0.3 x V
DD
Min
2.4
Typ
2.6
13
Max
2.8
20
Units
V
µA
V
V
V3
0
0
0
0
1
1
V2
0
0
1
1
0
1
V1
0
1
0
1
x
x
ANT – RX2
ANT – RX3
ANT – RX4
ANT - TX1
ANT - TX2
Document No. 70-0165-03
www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
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