PE4235
Product Specification
Figure 3. Pin Configuration
RF2
GND
RF1
1
2
3
Exposed Solder
Pad - Shorted
to Pin 2
(bottom side)
Table 4. Absolute Maximum Ratings
Symbol
Parameter/Conditions
Power Supply Voltage
Voltage on any input
except for CTRL pin
Voltage on CTRL pin
Storage temperature range
Operating temperature
range
Input power (50
Ω)
ESD Voltage (Human Body
Model)
-65
-40
Min
-0.3
-0.3
Max
4.0
V
DD
+ 0.3
5
150
85
19
200
Units
V
V
V
°C
°C
dBm
V
6
5
4
RFC
CTRL
V
DD
V
I
V
CTRL
T
ST
V
DD
T
OP
P
IN
V
ESD
Table 2. Pin Descriptions
Pin
No.
1
2
Pin
Name
RF2
GND
RF2 port.
1
Description
3
4
5
RF1
V
DD
CTRL
Ground Connection. Traces should be
physically short and connected to the
ground plane. This pin is connected to
the exposed solder pad that also must
be soldered to the ground plane for best
performance.
RF1 port.
1
Nominal 3 V supply connection.
CMOS or TTL logic level:
High = RFC to RF1 signal path
Low = RFC to RF2 signal path
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Control Logic Input
The control logic input pin (CTRL) is typically
driven by a 3-volt CMOS logic level signal. For
flexibility to support systems that have 5-volt
control logic drivers, the control logic input has
been designed to handle a standard 5-volt TTL
control signal. This TTL control signal input must
not exceed 5-volts or damage to the switch could
result.
Table 5. Control Logic Truth Table
Control Voltage
Signal Path
RFC to RF1
RFC to RF2
6
RFC
Common RF port for switch.
1
Notes: 1.
All RF pins must be DC blocked with an external series
capacitor or held at 0 V
DC
.
Table 3. DC Electrical Specifications
Parameter
V
DD
Power Supply Voltage
I
DD
Power Supply Current
(V
DD
= 3V, V
CNTL
= 3V)
Control Voltage High
Control Voltage Low
0.7xV
DD
0.3xV
DD
Min
2.7
Typ
3.0
250
Max
3.3
500
Units
V
CTRL = CMOS or TTL High
CTRL = CMOS or TTL Low
nA
V
V
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 4.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 8
Document No. 70-0069-03
│
UltraCMOS™ RFIC Solutions
PEREGRINE [ PEREGRINE SEMICONDUCTOR CORP. ]
