PE3342
Product Specification
Pin No.
TSSOP
18
19
20
21
22
23
24
Pin No.
QFN
13
14
15
16
17
Pin Name
Dout
V
DD
PD_D
PD_U
EESel
GND
Type
Output
(Note 1)
Output
Output
Input
(Note 2)
Input
ENH.
Same as pin 1.
Description
Data out function. Dout is defined with the Enhancement Register and enabled with
Phase detector output. PD_D pulses negatively when fp leads fc.
Phase detector output. PD_U pulses negatively when fc leads fp.
Control line for Frequency Register selection, EE Register parallel loading, and
EEPROM programming. Internal 70 kΩ
pull-up resistor.
Ground.
Reference frequency input.
18
f
r
Notes 1:
V
DD
pins 1, 11, and 19 (TSSOP) or pins 6, 14 and 19 (QFN), are connected by diodes and must be supplied with the same positive voltage
level.
2:
Ground connections are made through the exposed solder pad. The solder pad must be soldered to the ground plane for proper operation .
Table 2. Absolute Maximum Ratings
Symbol
V
DD
V
I
T
Stg
Table 4. ESD Ratings
Units
V
V
°C
Parameter/Conditions
Supply voltage
Voltage on any digital
input
Storage temperature
range
Min
–0.3
–0.3
–65
Max
+4.0
V
DD
+0.3
+85
Symbol
V
ESD
V
ESD
(V
PP
)
Parameter/Conditions
ESD voltage human body
model (Note 1)
ESD voltage human body
model (Note 1)
Min
Max
1000
200
Units
V
V
Note 1:
Periodically sampled, not 100% tested. Tested per MIL-
STD-883, M3015 C2
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC and AC Characteristics table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Table 3. DC Electrical Specifications
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating in Table 4.
Latch-Up Avoidance
Symbol
V
DD
T
A
Parameter/Conditions
Supply voltage
Operating ambient
temperature range
Min
2.85
-40
Max
3.15
85
Units
V
°C
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Document No. 70-0091-03
│
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©2005 Peregrine Semiconductor Corp. All rights reserved.
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