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3340-00 参数 Datasheet PDF下载

3340-00图片预览
型号: 3340-00
PDF下载: 下载PDF文件 查看货源
内容描述: 3.0 GHz的整数N分频PLL的低相位噪声应用 [3.0 GHz Integer-N PLL for Low Phase Noise Applications]
分类和应用:
文件页数/大小: 12 页 / 141 K
品牌: PEREGRINE [ PEREGRINE SEMICONDUCTOR CORP. ]
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PE3340
Advance Information
Pin No.
17
18
19
20
Note 1:
Pin Name
PD_D
PD_U
GND
f
r
Type
Output
Output
PD_D pulses down when f
p
leads f
c
.
PD_U pulses down when f
c
leads f
p
.
Ground.
Input
Reference frequency input.
Description
V
DD
pins 1, 9, and 16 are connected by diodes and must be supplied with the same positive voltage level.
Table 2. Absolute Maximum Ratings
Symbol
V
DD
V
I
I
I
I
O
T
stg
Electrostatic Discharge (ESD) Precautions
Max
4.0
V
DD
+ 0.3
+10
+10
150
Parameter/Conditions
Supply voltage
Voltage on any input
DC into any input
DC into any output
Storage temperature
range
Min
-0.3
-0.3
-10
-10
-65
Units
V
V
mA
mA
°
C
When handling this UTSi device, observe the same
precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
rating specified in Table 4.
Latch-Up Avoidance
Unlike conventional CMOS devices, UTSi CMOS
devices are immune to latch-up.
Table 3. Operating Ratings
Symbol
V
DD
T
A
Parameter/Conditions
Supply voltage
Operating ambient
temperature range
Min
2.85
-40
Max
3.15
85
Units
V
°
C
Table 4. ESD Ratings
Symbol
V
ESD
Parameter/Conditions
ESD voltage human body
model (Note 1)
Level
1000
Units
V
Note 1:
Periodically sampled, not 100% tested. Tested per MIL-
STD-883, M3015 C2
PEREGRINE SEMICONDUCTOR CORP.
®
|
http://www.psemi.com
Copyright
©
Peregrine Semiconductor Corp. 2004
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