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P10MU-2412ZH40LF 参数 Datasheet PDF下载

P10MU-2412ZH40LF图片预览
型号: P10MU-2412ZH40LF
PDF下载: 下载PDF文件 查看货源
内容描述: [Analog Circuit]
分类和应用:
文件页数/大小: 4 页 / 143 K
品牌: PEAK [ PEAK ELECTRONICS GMBH ]
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Package / Pinning / Derating
7.62
(0.30)
10.16
(0.40)
0.25
(0.01)
PIN CONNECTIONS
# SINGLE
≥3KV
DUAL
≥3KV
1 - Vin
- Vin
7 N.C.
N.C.
8 +Vout
+Vout
9 Omitted
Common
10 - Vout
- Vout
11 Omitted
Omitted
14 +Vin
+Vin
App Notes:
¹ =
Measured Input reflected ripple current with a simulated source inductance of 12uH.
² =
Tested by minimal Vin and constant resistive load.
- Operation under no-load conditions will not damage these devices, but they will not observe the listed specifications.
- For reduce converter’s ripple & noise, it is recommended to add a 4.7µF~220µF(±4.7µF~±100µF for dual output) capacitor in
output end. For EMI performance improvement, it is recommended to add a 12µH inductor and a 10µF~100µF capacitor in input
end.
PM3-Series – P10MU-xxxxE/Z(Hxx)LF – Single and Dual Output – DIP14 - Plastic Case
Specification can change without a notice – We accept no liability for any inaccuracy or printing errors.
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