AN8018SA
s
Terminal Equivalent Circuits (continued)
Pin No.
12
Equivalent circuit
V
CC
0.9 V
FB2 OSC
PWM
Description
Voltage Regulators
I/O
I
0.9 V
13
12
DT2:
The pin for setting channel 2 output maximum
duty ratio.
If this terminal is set at a voltage of 0.9 V or more,
FB2 terminal becomes high-level voltage and the
protective function for channel 2 output short-
circuit will stop (Unlatch function).
FB2:
The output pin for error amplifier 2 block.
The source current is
−47 µA
and the sink current
is 47
µA.
Correct the frequency characteristics of the gain
and the phase by connecting a resistor and a ca-
pacitor between this terminal and GND.
IN+2:
The noninverting input pin for error amplifier 2
block.
O
V
CC
47
µA
OSC
47
µA
PWM
IN+2
1.19 V
13
14
V
CC
I
14
100
Ω
1.19 V
15
30 kΩ
15
60 kΩ
Internal circuit
start/stop
Off:
The terminal for on/off control.
High-level input: Normal operation (V
OFF
>
1.3
V)
Low-level input: Standby state (V
OFF
<
0.8 V)
The total current consumption in the standby state
can be suppressed to a value 1 mA or less.
V
REF
:
The output terminal for the internal reference
voltage.
The reference voltage is 1.19 V (allowance:
±
2%) at
V
CC
=
2.4 V and I
REF
= −
0.1 mA.
Connect a capacitor of 0.01
µF
or more between
V
REF
and GND for phase compensation.
I
16
O
V
CC
16
8
PANASONIC [ PANASONIC SEMICONDUCTOR ]
