ICs for TV
s
Electrical Characteristics at V
CC
=
9 V, V
CC
=
5 V, T
a
=
25°C (continued)
The characteristics listed below are theoretical values based on the IC design and are not guaranteed.
AN5394FB
Parameter
(4) OSD, RGB (continued)
Ym rising delay
Ym falling delay
RGB rising delay
RGB falling delay
Symbol
Conditions
Min
Typ
Max
Unit
t
rYm
t
fYm
t
rRGB
t
fRGB
Ys: Low
→
varying amount of high
Ym: Low
→
varying amount of high
RGB: Low
→
varying amount of high
RGB, Ym: Low
→
varying amount of
high
−20°C
to
+70°C
22
20
28
43
−40
−40
−40
−50
1.5
±2
1.5
±2
200
ns
ns
ns
ns
mV
mV
mV
mV
V[p-p]
%
V[p-p]
%
mV
Pedestal change at Ys changeover
∆V
P(Ys)
Pedestal change at Ym changeover
∆V
P(Ym)
Pedestal change at RGB changeover
∆V
P(RGB)
Pedestal change at
RGB+Ym changeover
OSD input dynamic range
OSD output amplitude
ambient temp. dependency
RGB input dynamic range
RGB output amplitude
ambient temp. dependency
R, B-in clamp voltage
variable range
(5) Cutoff drive
Blanking delay
Pedestal fluctuation at contrast
variation
Pedestal fluctuation
at color variation
t
dBLK(1)
∆V
P(CONT)
∆V
P(COLOR)
∆V
P
(RGB+Ym)
D
OSD
OSD
∆T
D
RGB
RGB
∆T
∆V
CLP
−20°C
to
+70°C
R-in, B-in−DC adj
min.
→
max.
From BLK to BLK output
Contrast: min.
→
max.
Contrast: min.
→
max.
45
0
0
0
−1.5
7.8
ns
mV
mV
mV
mV/°C
V
Pedestal fluctuation at tint variation
∆V
P(TNIT)
Output pedestal potential
ambient temp. dependency
Spot killer operation
(6) I
2
C DAC
4 · 5 · 6DAC
DNLE
8-bit DAC DNLE
(excluding 40, 80, CO)
8-bit DAC DNLE
(for 40, 80, CO only)
7-bit DAC DNLE
(excluding 40)
7-bit DAC DNLE
(for 40 only)
L1
L2
L3
L4
L5
1LSB
=
{DAT (max.)
−
data(min.)}/(2
N−
1)
1LSB
=
{DAT (max.)
−
data(min.)}/(2
N−
1)
1LSB
=
{DAT (max.)
−
data(min.)}/(2
N−
1)
1LSB
=
{DAT (max.)
−
data(min.)}/(2
N−
1)
1LSB
=
{DAT (max.)
−
data(min.)}/(2
N−
1)
∆VP
∆T
V
SP
−20°C
to
+70°C
Lowering 9V system V
CC
Pin 29: C
=
10
µF
0.1
0.1
−1.0
0.1
−1.0
1.0
1.0
1.0
1.0
1.0
1.9
1.9
2.0
1.9
2.0
LSB
STep
LSB
STep
LSB
STep
LSB
STep
LSB
STep
11
PANASONIC [ PANASONIC SEMICONDUCTOR ]
