Silicon MOS FETs (Small Signal)
P
D
Ta
240
120
2SK620
I
D
V
DS
60
| Y
fs
|
V
GS
Forward transfer admittance |Y
fs
| (mS)
Ta=25˚C
V
DS
=5V
Ta=25˚C
50
Allowable power dissipation P
D
(mW)
200
100
Drain current I
D
(mA)
V
GS
=6.0V
80
5.5V
5.0V
60
160
40
120
4.5V
30
80
40
4.0V
3.5V
3.0V
2.5V
0
2
4
6
8
10
12
20
40
20
10
0
0
20
40
60
80 100 120 140 160
0
0
0
2
4
6
8
10
12
Ambient temperature Ta (˚C)
Drain to source voltage V
DS
(V)
Gate to source voltage V
GS
(V)
C
iss
, C
oss
, C
rss
V
DS
Input capacitance (Common source), Output capacitance (Common source),
Reverse transfer capacitance (Common source) C
iss
,C
oss
,C
rss
(pF)
12
V
GS
=0
f=1MHz
Ta=25˚C
120
I
D
V
GS
Drain to source ON-resistance R
DS(on)
(
Ω
)
120
V
DS
=5V
Ta=25˚C
100
R
DS(on)
V
GS
I
D
=20mA
100
10
C
iss
8
Drain current I
D
(mA)
80
Ta=–25˚C
25˚C
80
6
60
75˚C
60
Ta=75˚C
25˚C
–25˚C
4
C
oss
2
C
rss
1
3
10
30
100
40
40
20
20
0
0
0
2
4
6
8
10
12
0
0
2
4
6
8
10
12
Drain to source voltage V
DS
(V)
Gate to source voltage V
GS
(V)
Gate to source voltage V
GS
(V)
V
IN
I
O
100
30
V
O
=5V
Ta=25˚C
Input voltage V
IN
(V)
10
3
1
0.3
0.1
0.03
0.01
0.1
0.3
1
3
10
30
100
Output current I
O
(mA)
2
PANASONIC [ PANASONIC SEMICONDUCTOR ]
