Power F-MOS FETs
Area of safe operation (ASO)
100
60
2SK2129
P
D
Ta
Avalanche energy capacity EAS (mJ)
Allowable power dissipation P
D
(W)
(1) T
C
=Ta
(2) Without heat sink
(P
D
=2W)
30
V
DD
=50V
I
D
=3A
25
EAS
T
j
Non repetitive pulse
T
C
=25˚C
50
Drain current I
D
(A)
10 I
DP
I
D
t=100µs
40
(1)
30
20
1
1ms
10ms
DC
15
20
10
0.1
10
(2)
5
0.01
1
10
100
1000
0
0
20
40
60
80 100 120 140 160
0
25
50
75
100
125
150
175
Drain to source voltage V
DS
(V)
Ambient temperature Ta (˚C)
Junction temperature T
j
(˚C)
I
D
V
DS
4
V
GS
=15V
10V
6V
4
T
C
=25˚C
5
I
D
V
GS
6
V
DS
=25V
V
th
T
C
V
DS
=25V
I
D
=1mA
5
Drain current I
D
(A)
Drain current I
D
(A)
3
5.5V
T
C
=0˚C
3
25˚C
150˚C
100˚C
Gate threshold voltage V
th
(V)
10
12
4
2
5V
3
2
2
1
4.5V
50W
1
1
4V
0
0
10
20
30
40
50
60
0
0
2
4
6
8
0
0
25
50
75
100
125
150
Drain to source voltage V
DS
(V)
Gate to source voltage V
GS
(V)
Case temperature T
C
(˚C)
V
DS
V
GS
Drain to source ON-resistance R
DS(on)
(
Ω
)
80
T
C
=25˚C
12
R
DS(on)
I
D
3.0
| Y
fs
|
I
D
Forward transfer admittance |Y
fs
| (S)
V
GS
=10V
V
DS
=25V
T
C
=25˚C
2.5
Drain to source voltage V
DS
(V)
70
60
50
40
30
20
10
0
0
3A
0.75A
10
T
C
=150˚C
8
2.0
100˚C
6
25˚C
4
0˚C
2
1.5
I
D
=6A
1.0
0.5
1.5A
10
15
20
25
30
0
0
1
2
3
4
5
0
0
1
2
3
4
5
5
Gate to source voltage V
GS
(V)
Drain current I
D
(A)
Drain current I
D
(A)
2
PANASONIC [ PANASONIC SEMICONDUCTOR ]
