OXU210HP Data Sheet
Oxford Semiconductor, Inc.
Table 12 lists the LQFP pin allocations.
Table 12 OXU210HP 128-Pin LQFP Pin Allocations (Sheet 1 of 2)
(1)
Pin
No.
Bits
Name
Description
Type
Processor Interface (61 pins)
14, 15, 16, 17, 19, 16
20, 21, 22, 23, 24,
25, 26, 30, 31, 32,
33
MSBCT
D - D
16-bit data bus
0
15
34, 35, 36, 37, 38, 16
39, 40, 41, 2, 3, 4,
5, 8, 9, 10, 11
MSBCT
MSI
D
- D
Additional 16-bits of data bus for optional 32-bit
mode. In 16-bit mode, these signals have an internal
pull down
16
31
106, 107, 108,
109, 110, 111,
112, 113, 116,
117, 118, 119,
120, 123, 124,
125
16
A - A
Address bus for direct address space of 72 Kbytes
plus memory mapped registers
1
16
127
1
1
1
1
1
MSIU
MSIU
MSIU
MOCT
/WR
/RD
/CS
/INT
Write strobe
Read strobe
Chip select
126
83
Interrupt to the MCU.This pin can be software
configured as a driven output or WO. WO is the
default
84
1
2
2
2
2
I
/RESET
DRQ , DRQ
Hardware reset
90, 91
92, 93
42, 43
44, 45
MOCT
SI
DMA request outputs to support two channels
DMA acknowledge
1
0
ACK , ACK
1
0
MSI
MSID
BE , BE
Byte enables
0
1
3
BE , BE
Byte enables. These signals have an internal pull
down.
2
General Purpose I/O (4 pins)
96, 97, 98, 99
4
BC
GPIO - GPIO
General purpose I/O
Digital ground
0
3
Power and Ground (38 pins)
7, 13, 28, 29, 55, 13
56, 79, 82, 95,
105, 115, 122,
128
V
SS
46, 51, 60, 65, 68,
73
6
V
V
Analog ground
SSA
18, 53, 54, 81,
114
5
1.8 V core power. VREGOUT may be used for the
supplies
DD1.8
47, 52, 59, 64, 72
5
7
V
V
Analog +3.3 V power
DD3.3A
IO
6, 12, 27, 80, 94,
104, 121
Wide-range I/O voltage. If using +1.8 V, VREGOUT
may be used for the supplies
74
1
V
Digital +3.3 V power
DD3IO
10
External—Free Release
DS-0037 Feb 07
OXFORD [ OXFORD SEMICONDUCTOR ]
