OXU140CM Data Sheet
Oxford Semiconductor, Inc.
Table 13 OXU140CM 128-Pin LQFP Pin Allocations (Sheet 3 of 3)
(1)
Pin
No.
Pins
Name
Description
Type
Internal Voltage Regulator (2 pins)
104
1
I
ENVREG
Enables the internal voltage regulator if asserted. If
not used, this pin should be tied to V
SS
105
1
O
VREGOUT
Internal voltage regulator output of 1.8 V. If enabled,
this output should be connected to the V
DD1.8
supplies of the chip. If the regulator is disabled, this
pin should be treated as another V
supply input
DD1.8
to the chip
Test (2 pins)
83
1
1
I
XMODE
TEST
Xcrv test mode. This pin should be grounded for
normal operation
113
ID
Factory test mode. This pin should be grounded or
left floating (has an internal pull-down) for normal
operation
Miscellaneous (11 pins)
55, 57, 59, 69, 70,
71 72, 96, 99,
100,111
1
NC
No connection. These pins should be left floating
Note to Table 13:
1
Type key: format is [(L)(W_)X(Y)(_Z(T))] where the following conventions apply:
L—Logic Level
W—Tolerance
X—Type
Input
Y—Pull
Pull up
Z—Drive
T—Tristate
T Tristate
(2)
(3)
Multi-voltage:
3.3 V CMOS
2.5 V CMOS
1.8 V CMOS
5
5 V
I
U
D
M
C
3.3 V
O
Output
Pull down
Normal
S
Schmitt Trigger
B
Bidirectional
None
2
3
Program to 3.3 V, 2.5 V, or 1.8 V by setting the VIO voltage level.
Program to 2 mA, 4 mA, 6 mA, 8 mA, 10 mA, 12 mA, 14 mA, or 16 mA.
12
External--Free Release
DS-0038 Jul 06
OXFORD [ OXFORD SEMICONDUCTOR ]
