OXmPCI954
OXFORD SEMICONDUCTOR LTD.
1 PERFORMANCE COMPARISON
Feature
16C554 +
PCI Bridge PCI Bridge
16C654 +
OXmPCI954
Internal serial channels
4
0
0
Integral IEEE 1284 EPP/ECP parallel port
Multi-function PCI device
Support for PCI Power Management
Zero wait-state write operation
No. of available Local Bus interrupt pins
DWORD access to UART Interrupt Source
Registers & FIFO Levels
Good-Data status
yes
yes
yes
yes1
12
no
no
no
no
2
no
no
no
no
2
yes
no
no
yes
yes
yes
no
yes
no
no
yes
no
Full Plug and Play with external EEPROM
Subsystem Vendor ID & Subsystem ID with
no external EEPROM
External 1x baud rate clock
Max baud rate in normal mode
Max baud rate in 1x clock mode
FIFO depth
yes
15 Mbps
60 Mbps
128
no
115 Kbps
n/a
16
no
1.5 Mbps
n/a
64
Sleep mode
Auto Xon/Xoff flow
Auto CTS#/RTS# flow
Auto DSR#/DTR# flow
yes
yes
yes
yes
no
no
no
no
yes
yes
yes
no
No. of Rx interrupt thresholds
No. of Tx interrupt thresholds
No. of flow control thresholds
Transmitter empty interrupt
Readable status of flow control
Readable FIFO levels
128
128
128
yes
yes
yes
4
1
n/a
no
no
4
4
4
no
no
no
no
Clock prescaler options
Rx/Tx disable
248
yes
n/a
no
2
no
Software reset
yes
no
no
Device ID
yes
no
no
9-bit data frames
yes
no
no
RS485 buffer enable
yes
no
no
Infra-red (IrDA)
yes
no
yes
Table 1: OXmPCI954 performance compared with PCI Bridge + generic UART combinations
Note 1:
Zero wait-state applies only to the internal UARTs (after the assertion of DEVSEL#).
Read operation incurs 1 wait state.
DS-0019 Jun 05
External—Free Release
Page 6