OXMPCI952-VB-AG 参数 Datasheet PDF下载

OXFORD SEMICONDUCTOR LTD.

OXmPCI952

T

ABLE OF

C

ONTENTS

1

2

3

4

5

5.1

5.2

5.2.1

5.3

5.3.1

5.3.2

5.3.3

5.4

5.4.1

5.4.2

5.4.3

5.4.4

5.4.5

5.4.6

5.4.7

5.4.8

5.5

5.6

5.6.1

5.6.2

5.7

5.8

2.1

2.2

3.1

3.2

BLOCK DIAGRAM ................................................................................................................................ 8

PIN INFORMATION—160-PIN LQFP .................................................................................................... 9

PINOUTS............................................................................................................................................................................. 9

PIN DESCRIPTIONS......................................................................................................................................................... 10

PINOUTS........................................................................................................................................................................... 16

PIN DESCRIPTIONS......................................................................................................................................................... 17

PIN INFORMATION—176-PIN BGA.................................................................................................... 16

CONFIGURATION & OPERATION ..................................................................................................... 22

PCI TARGET CONTROLLER.............................................................................................................. 23

OPERATION ..................................................................................................................................................................... 23

CONFIGURATION SPACE ............................................................................................................................................... 23

PCI CONFIGURATION SPACE REGISTER MAP........................................................................................................ 24

ACCESSING LOGICAL FUNCTIONS .............................................................................................................................. 26

PCI ACCESS TO INTERNAL UARTS........................................................................................................................... 26

PCI ACCESS TO 8-BIT LOCAL BUS............................................................................................................................ 27

PCI ACCESS TO PARALLEL PORT ............................................................................................................................ 28

ACCESSING LOCAL CONFIGURATION REGISTERS................................................................................................... 29

LOCAL CONFIGURATION AND CONTROL REGISTER ‘LCC’ (OFFSET 0X00) ........................................................ 29

MULTI-PURPOSE I/O CONFIGURATION REGISTER ‘MIC’ (OFFSET 0X04) ............................................................ 30

LOCAL BUS TIMING PARAMETER REGISTER 1 ‘LT1’ (OFFSET 0X08): .................................................................. 32

LOCAL BUS TIMING PARAMETER REGISTER 2 ‘LT2’ (OFFSET 0X0C): ................................................................. 33

UART RECEIVER FIFO LEVELS ‘URL’ (OFFSET 0X10)............................................................................................. 35

UART TRANSMITTER FIFO LEVELS ‘UTL’ (OFFSET 0X14)...................................................................................... 35

UART INTERRUPT SOURCE REGISTER ‘UIS’ (OFFSET 0X18)............................................................................... 35

GLOBAL INTERRUPT STATUS AND CONTROL REGISTER ‘GIS’ (OFFSET 0X1C) ................................................ 36

PCI INTERRUPTS............................................................................................................................................................. 38

POWER MANAGEMENT .................................................................................................................................................. 39

POWER MANAGEMENT OF FUNCTION 0 ................................................................................................................. 39

POWER MANAGEMENT OF FUNCTION 1 ................................................................................................................. 40

MINIPCI SUPPORT........................................................................................................................................................... 42

DEVICE DRIVERS ............................................................................................................................................................ 46

6

6.1

6.1.1

6.1.2

6.1.3

6.1.4

6.1.5

6.1.6

6.2

6.3

6.3.1

6.3.2

6.4

6.4.1

6.5

6.5.1

6.5.2

6.5.3

INTERNAL OX16C950 UARTS ........................................................................................................... 47

OPERATION – MODE SELECTION ................................................................................................................................. 47

450 MODE..................................................................................................................................................................... 47

550 MODE..................................................................................................................................................................... 47

EXTENDED 550 MODE ................................................................................................................................................ 47

750 MODE..................................................................................................................................................................... 47

650 MODE..................................................................................................................................................................... 47

950 MODE..................................................................................................................................................................... 48

REGISTER DESCRIPTION TABLES ............................................................................................................................... 49

RESET CONFIGURATION ............................................................................................................................................... 53

HARDWARE RESET .................................................................................................................................................... 53

SOFTWARE RESET ..................................................................................................................................................... 53

TRANSMITTER AND RECEIVER FIFOS ......................................................................................................................... 54

FIFO CONTROL REGISTER ‘FCR’ .............................................................................................................................. 54

LINE CONTROL & STATUS............................................................................................................................................. 55

FALSE START BIT DETECTION.................................................................................................................................. 55

LINE CONTROL REGISTER ‘LCR’............................................................................................................................... 55

LINE STATUS REGISTER ‘LSR’ .................................................................................................................................. 56

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DS-0020 Jun 05