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OXCF950-TQ-B 参数 Datasheet PDF下载

OXCF950-TQ-B图片预览
型号: OXCF950-TQ-B
PDF下载: 下载PDF文件 查看货源
内容描述: 单个全双工异步信道128字节深度的发送器/接收FIFO中 [Single full-duplex asynchronous channel 128-byte deep transmitter / receiver FIFO]
分类和应用: 电信集成电路电信电路先进先出芯片
文件页数/大小: 66 页 / 789 K
品牌: OXFORD [ OXFORD SEMICONDUCTOR ]
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OXFORD SEMICONDUCTOR LTD.
OXCF950 rev B DATA SHEET V 1.0
3
P
IN
D
ESCRIPTIONS
TQFP Pin Number (TFBGA ball)
CF/PCMCIA Interface and Control
46, 45, 43, 42
(D4, A2, A3, B3)
6, 7, 10, 11, 12, 37, 38, 41
(E2, E1, F1, F3, G1, A6, B5, A4)
44 (C3)
5 (D1)
4 (D2)
1 (B1)
3 (C1)
2 (C2)
32 (C5)
Dir
1
I
I/O
IU
IU
I
I
IU
IU
O
O
Name
A[3:0]
D[7:0]
REG#
CE[1]#
OE#
WE#
IORD#
IOWR#
WP
IOIS16#
INT
RESET
READY#
IREQ#
Description
PCMCIA/CF address bus, bits [3:0]
PCMCIA/CF data bi-directional bus.
Register select and I/O enable
Active low card enable
Active low memory read enable
Active-low write enable used for strobing Memory Write data
(Attribute memory).
Active-low I/O read enable
Active-low I/O write enable
Write protect (in Memory only mode)
Data is 16 bit (in IO and Memory mode)
C950 Mode:Active-high
interrupt request
PCMCIA/CF Reset
Device ready (in Memory only mode)
Active-low Interrupt request (in C950, IO and Memory mode).
UART serial data output.
UART IrDA data output when MCR[6] is set in enhanced
mode.
UART serial data input.
UART IrDA data input when IrDA mode is enabled (see
above).
Active-low modem data-carrier-detect input.
Active-low modem data- terminal-ready output. If automated
DTR# flow control is enabled, the DTR# pin is asserted and
de-asserted if the receiver FIFO reaches or falls below the
programmed thresholds, respectively.
In RS485 half- duplex mode, the DTR# pin may be
programmed to reflect the state of the transmitter empty bit to
automatically control the direction of the RS485 transceiver
buffer (see register ACR[4:3]).
Transmitter 1x clock (baud rate generator output). For
isochronous applications, the 1x (or Nx) transmitter clock may
be asserted on the DTR# pin (see register CKS[5:4]).
Active–low modem request to-send output. If automated
-
RTS# flow control is enabled, the RTS# pin is de-asserted
and reasserted whenever the receiver FIFO reaches or falls
below the programmed thresholds, respectively.
Active-low modem clear-to-send input. If automated CTS#
flow control is enabled, upon de-assertion of the CTS# pin,
the transmitter will complete th e current character and enter
Page 8
47 (B2)
48 (A1)
UART / Local Bus Function
24 (H6)
O
IU
O
O
SOUT
IrDA_Out
23 (G5)
I
SIN
IrDA_In
29 (E6)
26 (F5)
I
O
DCD#
DTR#
485_En
Tx_Clk_Out
25 (G6)
O
RTS#
27 (F6)
I
CTS#