OXFORD SEMICONDUCTOR LTD.
OX9162
Mode
Parallel
Local Bus
N/A
Local Bus
62
61
83
101
99, 91
63
85
77,78,79,82,
87,88,89,90
66,67,68,71,
72,73,74,76
Dir
1
Name
Description
O
O
O
O
O
O
O
O
O
O
O
I/O
LBRST
LBRST#
LBDOUT
LBCLK
LBCS[1:0]#
LBDS[1:0]#
LBWR#
LBRDWR#
LBRD#
Hi
LBA[7:0]
LBD[7:0]
Local bus active-high reset
Local bus active-low reset
Local bus data out enable. This pin can be used by external
transceivers; it is high when LBD[7:0] are in output mode and
low when they are in input mode.
Buffered PCI clock. Can be enabled / disabled by software
Local bus active-low Chip-Select (Intel mode)
Local bus active-low Data-Strobe (Motorola mode)
Local Bus active-low write-strobe (Intel mode)
Local Bus Read-not-Write control (Motorola mode)
Local Bus active-low read-strobe (Intel mode)
Permanent high (Motorola mode)
Local bus address signals
Local bus data signals
Data Sheet Revision 1.1 PRELIMINARY
Page 5
OXFORD [ OXFORD SEMICONDUCTOR ]
