OX16PCI952
OXFORD SEMICONDUCTOR LTD.
2 BLOCK DIAGRAM
Mode0
Config
Interface
Fifosel
SOUT[1:0]
SIN[1:0]
RTS[1:0]
DTR[1:0]
CTS[1:0]
Dual
UARTs
Function 0
AD[31:0]
DSR[1:0]
DCD[1:0]
RI[1:0]
C/BE[3:0]
PCI Clk
RST#
IDSEL
FRAME#
PCI
Interface
IRDY#
Interrupt
Logic
TRDY#
STOP#
DEVSEL#
PAR
MIO logic
MIO[1:0]
SERR#
PERR#
INTA#
INTB#
PD[7:0]
ACK#
PME#
Function 1
PE
BUSY
SLCT
Parallel
Port
Clock &
XTLI
Baud Rate
ERR#
SLIN#
XTLO
Generator
INIT#
AFD#
EE_DO
STB#
EE_CK
EEPROM
Interface
EE_CS
EE_DI
Internal Data/Control Bus
Figure 1: OX16PCI952 Block Diagram
DS-0028 Jul 05
External-Free Release
Page 7