欢迎访问ic37.com |
会员登录 免费注册
发布采购

OX12PCI840-PQAG 参数 Datasheet PDF下载

OX12PCI840-PQAG图片预览
型号: OX12PCI840-PQAG
PDF下载: 下载PDF文件 查看货源
内容描述: 集成并行端口和PCI接口 [Integrated Parallel Port and PCI interface]
分类和应用: PC
文件页数/大小: 33 页 / 272 K
品牌: OXFORD [ OXFORD SEMICONDUCTOR ]
 浏览型号OX12PCI840-PQAG的Datasheet PDF文件第4页浏览型号OX12PCI840-PQAG的Datasheet PDF文件第5页浏览型号OX12PCI840-PQAG的Datasheet PDF文件第6页浏览型号OX12PCI840-PQAG的Datasheet PDF文件第7页浏览型号OX12PCI840-PQAG的Datasheet PDF文件第9页浏览型号OX12PCI840-PQAG的Datasheet PDF文件第10页浏览型号OX12PCI840-PQAG的Datasheet PDF文件第11页浏览型号OX12PCI840-PQAG的Datasheet PDF文件第12页  
OXFORD SEMICONDUCTOR LTD.
OX12PCI840
3
C
ONFIGURATION
& O
PERATION
There are a set of Local configuration registers that can be
used to enable signals and interrupts, and configure
timings. These can be set up by drivers or from the
EEPROM.
All registers default after reset to suitable values for typical
applications. However, all identification, control and timing
registers can be redefined using an optional serial
EEPROM. As an additional enhancement, the EEPROM
can be used to program the parallel port, allowing pre-
configuration, without requiring driver changes.
The OX12PCI840 is a single function, target-only PCI
device, compliant with the PCI Local Bus Specification,
Revision 2.2 and PCI Power Management Specification,
Revision 1.0.
The OX12PCI840 is configured by system start-up
software during the bootstrap process that follows bus
reset. The system scans the bus and reads the vendor and
device identification codes from any devices it finds. It then
loads device-driver software according to this information
and configures the I/O, memory and interrupt resources.
Device drivers can then access the functions at the
assigned addresses in the usual fashion, with the improved
data throughput provided by PCI.
DS-0021 Jun 05
Page 8