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Electrical Characteristics
(V
DD
=16V, T
A
=25°C, unless otherwise specified)
Symbol
I
DD_ST
I
DD_OP
UVLO(ON)
UVLO(OFF)
OVP
V
DD_Clamp
T
LEB
Vth
_OC
Td_oc
Z
SENSE_IN
Tss
Freq_Nom
Freq_startup
Δf/Freq
V
REF
_EA
G
DC
I
_COMP_MAX
VOL
VOH
V
_clamp
T_r
T_f
DS‐RS2132‐03
September,
2009
www.Orister.com
Parameter
Standby current
Operation Current
VDD Under Voltage Lockout Enter
VDD Under Voltage Lockout Exit
Over voltage protection voltage
Maximum VDD opertation voltage
LEB time
Over current threshold
OCP Propagation delay
Input Impedance
Soft start time
System Nominal switch frequency
‐
Frequency jitter range
Reference voltage for EA
DC gain of the EA
Max. Cable compensation current
Output Low Level
Output High Level
Output Clamp Voltage Level
Output Rising Time
Output Falling Time
Test Conditions
Supply Voltage (VDD) Section
V
DD
=13V
Operation supply current
I
NV
=2V,CS=0V, V
DD
=V
DDG
=20V
VDD falling
VDD rising
Ramp up VDD until gate clock is off
I
DD
=10mA
Current Sense Input Section
‐
‐
‐
‐
‐
CV Section
‐
INV=0V, Comp=5V
‐
Error Amplifier Section
‐
‐
INV=2V, COMP=0V
Gate Drive Output Section
I
O
=20mA
I
O
=20mA
‐
CL=0.5nF
CL=0.5nF
Min.
‐
‐
13.5
7.5
27.5
30.5
‐
870
‐
‐
‐
‐
‐
‐
1.97
‐
‐
‐
8
‐
‐
‐
Typ.
5
2.5
14.5
8.5
29.5
32.5
540
900
150
50
10
60
14
+/‐4
2
60
42
‐
‐
16
650
40
Max.
20
3.5
16.0
10
31.5
34.5
‐
930
‐
‐
‐
‐
‐
‐
2.03
‐
‐
1
‐
‐
‐
‐
Unit
uA
mA
V
V
V
V
ns
mV
ns
KΩ
ms
KHZ
KHZ
%
V
dB
uA
V
V
V
ns
ns