UC3844B, UC3845B, UC2844B, UC2845B
V
CC
V
in
V
CC 7(12)
36V
V
ref
Reference
Regulator
8(14)
(See
Text)
+
−
V
CC
UVLO
R
R
V
C
Internal
Bias
2.5V
R
C
T
7(11)
+
3.6V
V
ref
UVLO
−
Output
Q1
Oscillator
4(7)
6(10)
T
+
1.0mA
S
Power Ground
2R
Q
Voltage
Feedback
Input
PWM
Latch
R
5(8)
2(3)
1(1)
R
Error
Amplifier
1.0V
Current Sense Input
Output/
Compensation
Current Sense
Comparator
3(5)
R
S
GND 5(9)
Pin numbers adjacent to terminals are for the 8−pin dual−in−line package.
Pin numbers in parenthesis are for the D suffix SOIC−14 package.
= Sink Only Positive True Logic
Figure 16. Representative Block Diagram
Capacitor C
T
Latch Set"
Input
Output/
Compensation
Current Sense
Input
Latch Reset"
Input
Output
Small R /Large C
T
T
Large R /Small C
T
T
Figure 17. Timing Diagram
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