UC3842A, 43A UC2842A, 43A
Figure 26. Current Waveform Spike Suppression
VCC
7(12)
+
–
Vin
Figure 27. MOSFET Parasitic Oscillations
VCC
7(12)
+
–
Vin
5.0Vref
+
–
+
–
5.0Vref
+
–
+
–
7(11)
Rg
6(10)
Q1
+
–
+
7(11)
Q1
6(10)
S
–
–
+
R
Comp/Latch
Q
5(8)
R
3(5)
C
RS
–
+
Q
R
Comp/Latch
S
5(8)
3(5)
RS
The addition of the RC filter will eliminate instability caused by the leading
edge spike on the current waveform.
Series gate resistor Rg will damp any high frequency parasitic oscillations
caused by the MOSFET input capacitance and any series wiring inductance
in the gate–source circuit.
Figure 28. Bipolar Transistor Drive
IB
+
0
–
Base Charge
Removal
C1
Q1
6(1)
5(8)
3(5)
RS
The totem–pole output can furnish negative base current for enhanced
transistor turn–off, with the addition of capacitor C1.
Vin
Figure 29. Isolated MOSFET Drive
VCC
7(12)
+
–
Isolation
Boundary
Q1
+
0
–
VGS Waveforms
Vin
5.0Vref
+
–
+
–
+
–
7(11)
6(1)
50% DC
S
Q
–
R
+
Comp/Latch
5(8)
R
3(5) C
RS
NS
Ipk =
Np
Figure 30. Latched Shutdown
Figure 31. Error Amplifier Compensation
From VO
Ri
2(3)
CI
Rf
1(1)
5(9)
2.5V
+
–
EA
+
1.0mA
2R
R
8(14)
R
Bias
R
Osc
Rd
4(7)
+
–
2(3)
1(1)
MCR
101
2N
3905
2N
3903
+
1.0mA
EA
2R
R
Error Amp compensation circuit for stabilizing any current–mode topology except
for boost and flyback converters operating with continuous inductor current.
From VO
5(9)
Rp
Cp
Ri
Rd
CI
2(3)
Rf
1(1)
5(9)
2.5V
+
–
EA
+
1.0mA
2R
R
The MCR101 SCR must be selected for a holding of less than 0.5 mA at
TA(min). The simple two transistor circuit can be used in place of the SCR as
shown. All resistors are 10 k.
Error Amp compensation circuit for stabilizing current–mode boost and flyback
topologies operating with continuous inductor current.
12
MOTOROLA ANALOG IC DEVICE DATA
ÉÉÉÉÉ
É
É
ÉÉÉÉ
+
0
–
25% DC
NP
NS
V(pin 1) – 1.4
3 RS
ONSEMI [ ON SEMICONDUCTOR ]
