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NCP304LSQ45T1G 参数 Datasheet PDF下载

NCP304LSQ45T1G图片预览
型号: NCP304LSQ45T1G
PDF下载: 下载PDF文件 查看货源
内容描述: 电压检测器系列 [Voltage Detector Series]
分类和应用:
文件页数/大小: 23 页 / 169 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
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NCP304, NCP305
MAXIMUM RATINGS
(Note 1)
Rating
Input Power Supply Voltage (Pin 2)
Output Voltage (Pin 1)
Complementary, NCP304
N−Channel Open Drain, NCP305
Output Current (Pin 1) (Note 2)
Thermal Resistance, Junction−to−Air
Maximum Junction Temperature
Storage Temperature Range
Latchup Performance (Note 3)
Positive
Negative
Symbol
V
in
V
OUT
−0.3 to V
in
+0.3
−0.3 to 12
I
OUT
R
qJA
T
J
T
stg
I
LATCHUP
500
170
70
285
+125
−55 to +150
mA
°C/W
°C
°C
mA
Value
12
Unit
V
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL−STD−883, Method 3015.
Machine Model Method 200 V.
2. The maximum package power dissipation limit must not be exceeded.
TJ(max)−TA
PD
+
R
qJA
3. Maximum Ratings per JEDEC standard JESD78.
ELECTRICAL CHARACTERISTICS
(For all values T
A
= 25°C, unless otherwise noted.)
Characteristic
NCP304/5 − 0.9
Detector Threshold (Pin 2, V
in
Decreasing)
Detector Threshold Hysteresis (Pin 2, V
in
Increasing)
Supply Current (Pin 2)
(V
in
= 0.8 V)
(V
in
= 2.9 V)
Maximum Operating Voltage (Pin 2)
Minimum Operating Voltage (Pin 2)
(T
A
= −40°C to 85°C)
Reset Output Current (Pin 1, Active Low ‘L’ Suffix Devices)
N−Channel Sink Current, NCP304, NCP305
(V
OUT
= 0.05 V, V
in
= 0.70 V)
(V
OUT
= 0.50 V, V
in
= 0.85 V)
P−Channel Source Current, NCP304
(V
OUT
= 2.4 V, V
in
= 4.5 V)
Reset Output Current (Pin 1, Active High ‘H’ Suffix Devices)
N−Channel Sink Current, NCP304, NCP305
(V
OUT
= 0.5 V, V
in
= 1.5 V)
P−Channel Source Current, NCP304
(V
OUT
= 0.4 V, V
in
= 0.7 V)
(V
OUT
= GND, V
in
= 0.8 V)
Propagation Delay Input to Output (Figure 2)
I
OUT
1.05
0.011
0.014
2.5
0.04
0.08
ms
V
DET−
V
HYS
I
in
V
in(max)
V
in(min)
I
OUT
0.01
0.05
1.0
0.05
0.50
2.0
mA
0.8
0.55
0.65
2.4
3.0
10
0.70
0.80
V
V
mA
0.882
0.027
0.900
0.045
0.918
0.063
V
V
mA
Symbol
Min
Typ
Max
Unit
4. In the case of CMOS Output Type: The time interval between the rising edge of V
DD
input pulse from 0.7 V to (+V
DET
) +2.0 V and output
voltage level becoming to V
DD
/2. In the case of N−Channel Open Drain Output Type: Output pin is pulled up with a resistance of 470 kW
to 5.0 V, the time interval between the rising edge of V
DD
input pulse from 0.7 V to (+V
DET
) +2.0 V and output voltage level becoming to
2.5 V.
http://onsemi.com
2