MC3403, MC3303
CIRCUIT DESCRIPTION
stage performs not only the first stage gain function but also
performs the level shifting and Transconductance reduction
functions. By reducing the Transconductance, a smaller
compensation capacitor (only 5.0 pF) can be employed, thus
saving chip area. The Transconductance reduction is
accomplished by splitting the collectors of Q24 and Q22.
Another feature of this input stage is that the input common
mode range can include the negative supply or ground, in
single supply operation, without saturating either the input
devices or the differential to single−ended converter. The
second stage consists of a standard current source load
amplifier stage.
The output stage is unique because it allows the output to
swing to ground in single supply operation and yet does not
exhibit any crossover distortion in split supply operation.
This is possible because Class AB operation is utilized.
Each amplifier is biased from an internal voltage regulator
which has a low temperature coefficient, thus giving each
amplifier good temperature characteristics as well as
excellent power supply rejection.
120
A
V
= 100
A VOL , LARGE SIGNAL
OPEN LOOP VOLTAGE GAIN (dB)
0.5 V/DIV
100
80
60
40
20
0
−20
1.0
10
100
1.0 k
10 k
f, FREQUENCY (Hz)
100 k
1.0 M
V
CC
= 15 V
V
EE
= −15 V
T
A
= 25°C
5.0 V/DIV
20
ms/DIV
Figure 2. Inverter Pulse Response
The MC3403/3303 is made using four internally
compensated, two−stage operational amplifiers. The first
stage of each consists of differential input device Q24 and
Q22 with input buffer transistors Q25 and Q21 and the
differential to single ended converter Q3 and Q4. The first
50 mV/DIV
*Note Class A B output stage produces distortion less sinewave.
50
ms/DIV
Figure 3. Sine Wave Response
Figure 4. Open Loop Frequency Response
30
VO, OUTPUT VOLTAGE RANGE (V pp)
VO, OUTPUT VOLTAGE (Vpp )
25
−
20
15
10
5.0
T
A
= 25°C
0
−5.0
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
1.0 M
+
−15 V
V
O
10 k
+15 V
30
T
A
= 25°C
20
10
0
0
2.0
4.0
6.0 8.0 10
12
14
16
18
V
CC
AND (V
EE
), POWER SUPPLY VOLTAGES (V)
20
Figure 5. Power Bandwidth
Figure 6. Output Swing versus Supply Voltage
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