MC14584B
Hex Schmitt Trigger
The MC14584B Hex Schmitt Trigger is constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. These devices find primary use where low power
dissipation and/or high noise immunity is desired. The MC14584B
may be used in place of the MC14069UB hex inverter for enhanced
noise immunity to “square up” slowly changing waveforms.
http://onsemi.com
MARKING
DIAGRAMS
14
PDIP–14
P SUFFIX
CASE 646
MC14584BCP
AWLYYWW
1
14
SOIC–14
D SUFFIX
CASE 751A
14584B
AWLYWW
1
Unit
V
V
mA
14
500
– 55 to +125
– 65 to +150
260
mW
°C
°C
°C
SOEIAJ–14
F SUFFIX
CASE 965
1
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
MC14584B
AWLYWW
TSSOP–14
DT SUFFIX
CASE 948G
1
14
14
584B
ALYW
•
Supply Voltage Range = 3.0 Vdc to 18 Vdc
•
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load over the Rated Temperature Range
•
Double Diode Protection on All Inputs
•
Can Be Used to Replace MC14069UB
•
For Greater Hysteresis, Use MC14106B which is Pin–for–Pin
Replacement for CD40106B and MM74Cl4
MAXIMUM RATINGS
(Voltages Referenced to V
SS
) (Note 2.)
Symbol
V
DD
V
in
, V
out
I
in
, I
out
P
D
T
A
T
stg
T
L
Parameter
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
Power Dissipation,
per Package (Note 3.)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
(8–Second Soldering)
Value
– 0.5 to +18.0
– 0.5 to V
DD
+ 0.5
±
10
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/
_
C From 65
_
C To 125
_
C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
(V
in
or V
out
)
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
SS
or V
DD
). Unused outputs must be left open.
ORDERING INFORMATION
Device
MC14584BCP
MC14584BD
MC14584BDR2
MC14584BDT
MC14584BDTEL
MC14584BF
MC14584BFEL
Package
PDIP–14
SOIC–14
SOIC–14
TSSOP–14
Shipping
2000/Box
55/Rail
2500/Tape & Reel
96/Rail
v
v
TSSOP–14 2000/Tape & Reel
SOEIAJ–14
SOEIAJ–14
See Note 1.
See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
©
Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 3
Publication Order Number:
MC14584B/D
ONSEMI [ ON SEMICONDUCTOR ]
