MC14066B
Quad Analog Switch/Quad
Multiplexer
The MC14066B consists of four independent switches capable of
controlling either digital or analog signals. This quad bilateral switch
is useful in signal gating, chopper, modulator, demodulator and
CMOS logic implementation.
The MC14066B is designed to be pin–for–pin compatible with the
MC14016B, but has much lower ON resistance. Input voltage swings
as large as the full supply voltage can be controlled via each
independent control input.
http://onsemi.com
MARKING
DIAGRAMS
14
PDIP–14
P SUFFIX
CASE 646
1
14
SOIC–14
D SUFFIX
CASE 751A
1
14
14066B
AWLYWW
MC14066BCP
AWLYYWW
•
•
•
•
•
•
Triple Diode Protection on All Control Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Linearized Transfer Characteristics
Low Noise — 12 nV/√Cycle, f
≥
1.0 kHz typical
Pin–for–Pin Replacement for CD4016, CD4016, MC14016B
For Lower R
ON
, Use The HC4066 High–Speed CMOS Device
MAXIMUM RATINGS
(Voltages Referenced to V
SS
) (Note 2.)
Symbol
V
DD
V
in
, V
out
I
in
I
SW
P
D
T
A
T
stg
T
L
Parameter
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
Input Current (DC or Transient)
per Control Pin
Switch Through Current
Power Dissipation,
per Package (Note 3.)
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
(8–Second Soldering)
Value
– 0.5 to +18.0
– 0.5 to V
DD
+ 0.5
±
10
±
25
500
– 55 to +125
– 65 to +150
260
Unit
V
V
mA
mA
mW
°C
°C
°C
TSSOP–14
DT SUFFIX
CASE 948G
1
14
SOEIAJ–14
F SUFFIX
CASE 965
1
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
14
066B
ALYW
MC14066B
AWLYWW
ORDERING INFORMATION
Device
MC14066BCP
MC14066BD
MC14066BDR2
MC14066BDT
MC14066BDTEL
MC14066BDTR2
MC14066BF
MC14066BFEL
Package
PDIP–14
SOIC–14
SOIC–14
TSSOP–14
Shipping
2000/Box
55/Rail
2500/Tape & Reel
96/Rail
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/
_
C From 65
_
C To 125
_
C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
(V
in
or V
out
)
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either V
SS
or V
DD
). Unused outputs must be left open.
v
v
TSSOP–14 2000/Tape & Reel
TSSOP–14 2500/Tape & Reel
SOEIAJ–14
SOEIAJ–14
See Note 1.
See Note 1.
1. For ordering information on the EIAJ version of
the SOIC packages, please contact your local
ON Semiconductor representative.
©
Semiconductor Components Industries, LLC, 2000
1
March, 2000 – Rev. 3
Publication Order Number:
MC14066B/D