MC14013B
20 ns
D
20 ns
90%
V
DD
90%
50%
10%
20 ns
90%
20 ns
V
SS
t
V
DD
su (L)
t
su
(H)
20 ns
SET OR
t
h
50%
V
DD
10%
RESET
V
SS
C
50%
t
w
t
rem
10%
t
WL
V
SS
20 ns
20 ns
50%
V
DD
t
90%
WH
50%
CLOCK
1
f
cl
10%
V
SS
t
w
t
t
t
PLH
PLH
PHL
V
OH
t
90%
50%
10%
PHL
V
OH
Q
Q OR Q
V
OL
V
OL
t
t
THL
TLH
Inputs R and S low.
Figure 1. Dynamic Signal Waveforms
(Data, Clock, and Output)
Figure 2. Dynamic Signal Waveforms
(Set, Reset, Clock, and Output)
TYPICAL APPLICATIONS
n–STAGE SHIFT REGISTER
th
1
2
n
D
D
C
Q
Q
D
C
Q
Q
D
C
Q
Q
Q
CLOCK
BINARY RIPPLE UP–COUNTER (Divide–by–2n)
th
1
2
n
D
C
Q
Q
D
C
Q
Q
D
C
Q
Q
Q
CLOCK
T FLIP–FLOP
MODIFIED RING COUNTER (Divide–by–(n+1))
th
1
2
n
D
C
Q
Q
D
C
Q
Q
D
C
Q
Q
Q
CLOCK
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