MC10H124
APPLICATIONS INFORMATION
The MC10H124 has TTL−compatible inputs and MECL
complementary open−emitter outputs that allow use as an
inverting/non−inverting translator or as a differential line
driver. When the common strobe input is at the low−logic
level, it forces all true outputs to a MECL low−logic state
and all inverting outputs to a MECL high−logic state.
ORDERING INFORMATION
Device
MC10H124L
MC10H124P
MC10H124PG
MC10H124FN
MC10H124FNG
MC10H124FNR2
MC10H124M*
MC10H124MEL*
Package
CDIP−16
PDIP−16
PDIP−16
(Pb−Free)
PLCC−20
PLCC−20
(Pb−Free)
PLCC−20
EIAJ−16
(Pb−Free)
EIAJ−16
(Pb−Free)
Shipping
†
25 Units/Rail
25 Units/Rail
25 Units/Rail
46 Units/Rail
46 Units/Rail
1000 Tape & Reel
50 Units/Rail
2000 Tape & Reel
An advantage of this device is that TTL−level information
can be transmitted differentially, via balanced twisted pair
lines, to MECL equipment, where the signal can be received
by the MC10H115 or MC10H116 differential line receivers.
The power supply requirements are ground, +5.0 V, and
−5.2 V.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This device is manufactured with a Pb−Free external lead finish only.
Resource Reference of Application Notes
AN1405/D
AN1406/D
AN1503/D
AN1504/D
AN1568/D
AN1642/D
AND8001/D
AND8002/D
AND8020/D
AND8066/D
AND8090/D
− ECL Clock Distribution Techniques
− Designing with PECL (ECL at +5.0 V)
− ECLinPSt I/O SPiCE Modeling Kit
− Metastability and the ECLinPS Family
− Interfacing Between LVDS and ECL
− The ECL Translator Guide
− Odd Number Counters Design
− Marking and Date Codes
− Termination of ECL Logic Devices
− Interfacing with ECLinPS
− AC Characteristics of ECL Devices
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