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MC100LVEL05DTR2 参数 Datasheet PDF下载

MC100LVEL05DTR2图片预览
型号: MC100LVEL05DTR2
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V ECL 2输入差分AND / NAND [3.3V ECL 2-Input Differential AND/NAND]
分类和应用:
文件页数/大小: 8 页 / 140 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
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MC100LVEL05
Table 1. PIN DESCRIPTION
D
0
1
8
V
CC
PIN
D0, D0; D1, D1
Q, Q
V
CC
V
EE
EP
FUNCTION
ECL Data Inputs
ECL Data Outputs
Positive Supply
Negative Supply
Exposed pad must be con-
nected to a sufficient thermal
conduit. Electrically connect
to the most negative supply or
leave floating open.
D
0
2
7
Q
D
1
3
6
Q
D
1
4
5
V
EE
Figure 1. Logic Diagram and Pinout Assignment
Table 2. MAXIMUM RATINGS
Symbol
V
CC
V
EE
V
I
I
out
T
A
T
stg
q
JA
q
JC
q
JA
q
JC
q
JA
T
sol
Parameter
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Wave Solder
Pb
Pb−Free
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
8 SOIC
8 SOIC
8 SOIC
8 TSSOP
8 TSSOP
8 TSSOP
DFN8
DFN8
Condition 1
V
EE
= 0 V
V
CC
= 0 V
V
EE
= 0 V
V
CC
= 0 V
Continuous
Surge
V
I

V
CC
V
I

V
EE
Condition 2
Rating
8 to 0
−8
to 0
6 to 0
−6
to 0
50
100
−40
to +85
−65
to +150
190
130
41 to 44
±
5%
185
140
41 to 44
±
5%
129
84
265
265
Unit
V
V
V
V
mA
mA
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
http://onsemi.com
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