ADM1032
Table 4. ELECTRICAL CHARACTERISTICS
Parameter
Serial Bus Timing
(Note 2)
Clock Frequency
SMBus Timeout (Note 3)
SCLK Clock Low Time, t
LOW
SCLK Clock High Time, t
HIGH
Start Condition Setup Time, t
SU:STA
Start Condition Hold Time, t
HD:STA
Stop Condition Setup Time, t
SU:STO
Data Valid to SCLK Rising Edge Time,
t
SU:DAT
Data Hold Time, t
HD:DAT
Bus Free Time, t
BUF
SCLK, SDATA Rise Time, t
R
SCLK, SDATA Fall Time, t
F
Between Start/Stop Condition
Time from 10% of SDATA to 90% of SCLK
Time from 90% of SCLK to 10% of SDATA
Time for 10% or 90% of SDATA to 10% of SCLK
t
LOW
between 10% Points
t
HIGH
between 90% Points
−
−
1.3
0.6
600
600
600
100
300
1.3
−
−
−
25
−
−
−
−
−
−
−
−
−
−
400
64
−
−
−
−
−
−
−
−
300
300
kHz
ms
ms
ms
ns
ns
ns
ns
ns
ms
ns
ns
Conditions
Min
Typ
Max
Unit
1. See Table 10 for information on other conversion rates.
2. Guaranteed by design, not production tested.
3. The SMBus timeout is a programmable feature. By default, it is not enabled. Details on how to enable it are available in the Serial Bus Interface
section.
t
LOW
SCLK
t
F
t
R
t
HD; STA
t
HD; STA
t
HD; DAT
t
HIGH
t
SU; DAT
t
SU; STA
t
SU; STO
SDATA
P
t
BUF
S
S
P
Figure 2. Serial Bus Timing Diagram
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4