74HC574
Octal 3−State Noninverting
D Flip−Flop
High−Performance Silicon−Gate CMOS
The 74HC574 is identical in pinout to the LS574. The device inputs
are compatible with standard CMOS outputs; with pull−up resistors,
they are compatible with LSTTL outputs.
Data meeting the set−up time is clocked to the outputs with the
rising edge of the Clock. The Output Enable input does not affect the
states of the flip−flops but when Output Enable is high, all device
outputs are forced to the high−impedance state. Thus, data may be
stored even when the outputs are not enabled.
The HC574 is identical in function to the HC374A but has the
flip−flop inputs on the opposite side of the package from the outputs to
facilitate PC board layout.
Features
http://onsemi.com
MARKING
DIAGRAMS
20
20
1
TSSOP−20
DT SUFFIX
CASE 948E
1
HC574
A
L
Y
W
G
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
HC
574
ALYW
G
G
•
•
•
•
•
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0
mA
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
•
ESD Performance: HBM
>
2000 V; Machine Model
>
200 V
•
Chip Complexity: 266 FETs or 66.5 Equivalent Gates
•
This is a Pb−Free Device
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
©
Semiconductor Components Industries, LLC, 2007
March, 2007
−
Rev. 1
1
Publication Order Number:
74HC574/D
ONSEMI [ ON SEMICONDUCTOR ]
