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11640-814 参数 Datasheet PDF下载

11640-814图片预览
型号: 11640-814
PDF下载: 下载PDF文件 查看货源
内容描述: [Video Clock Generator, 54MHz, CMOS, PDSO8, 0.150 INCH, SOIC-8]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 6 页 / 160 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
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FS6182
VCXO Clock Generator IC
Table 5: DC Electrical Specifications
Unless otherwise stated, V
DD
= 3.3V ± 10%, no load on any output, and ambient temperature range T
A
= 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization
data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are
±
3σ from typical. Negative currents indicate current flows out of the device.
PARAMETER
Overall
Supply Current, Dynamic, with Loaded
Outputs
Voltage Controlled Crystal Oscillator
Crystal Resonator Frequency
Crystal Loading Capacitance
Crystal Resonator Motional Capacitance
VCXO Tuning Range
VCXO Tuning Characteristic
Crystal Drive Level
Clock Outputs (CLKA, CLKB, CLKC)
High-Level Output Source Current *
Low-Level Output Sink Current *
Output Impedance *
Short Circuit Source Current *
Short Circuit Sink Current *
SYMBOL
CONDITIONS/DESCRIPTION
MIN.
TYP.
MAX.
UNITS
I
DD
f
XTAL
= 13.5MHz; C
L
= 10pF
20
mA
f
XTAL
C
L(xtal)
C
1(xtal)
Fundamental Mode
As seen by a crystal connected to XIN and
XOUT (@ V
XTUNE
= mid-range)
f
XTAL
= 13.5MHz; C
L
= 20pF; C
MOT
= 25fF
Note: positive delta F for positive delta V
R
XTAL
=20 ohm; C
L
= 20pF
5
13.5
20
20
300
100
200
18
MHz
pF
fF
ppm
ppm/V
uW
I
OH
I
OL
z
OH
z
OL
I
OSH
I
OSL
V
O
= 2.0V
V
O
= 0.4V
V
O
= 0.1V
DD
; output driving high
V
O
= 0.1V
DD
; output driving low
V
O
= 0V; shorted for 30s, max.
V
O
= 3.3V; shorted for 30s, max.
40
17
25
25
55
55
mA
mA
mA
mA
Table 6: AC Timing Specifications
Unless otherwise stated, V
DD
= 3.3V ± 10%, no load on any output, and ambient temperature range T
A
= 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization
data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are
±
3σ from typical.
PARAMETER
Clock Outputs (CLKx)
Duty Cycle *
Jitter, Absolute Period (pk-pk) *
Rise Time *
Fall Time *
Output Frequency Synthesis Error
VCXO Stabilization Time *
PLL Stabilization Time *
SYMBOL
CONDITIONS/DESCRIPTION
MIN.
TYP.
MAX.
UNITS
t
hi
/ t
clk
; Measured at V
DD
/2
t
j(∆P)
t
r
t
f
t
VCXOSTB
t
PLLSTB
From rising edge to next rising edge at V
DD
/2, C
L
=
10pF
V
DD
= 3.3V; V
O
= 0.3V to 3.0V; C
L
= 10pF
V
DD
= 3.3V; V
O
= 3.0V to 0.3V; C
L
= 10pF
(unless otherwise noted in Frequency Table)
From power valid
From VCXO stable
43
150
1
1
57
%
ps
ns
ns
0
10
500
ppm
ms
us
4
ISO9001
2.27.02