FEDL9205-03
1
Semiconductor
ML9205-01
2. CGRAM data write
(Specifies the addresses of CGRAM and writes character pattern data.)
CGRAM (Character Generator RAM) has a 4-bit address to store 5 × 7 dot matrix character patterns.
A character pattern stored in CGRAM can be displayed by specifying the character code (address) by
DCRAM.
The address of CGRAM is assigned to 00H to 0FH. (All the other addresses are the CGROM addresses.)
(The CGRAM can store 16 types of character patterns.)
[Command format]
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
1st byte
(1st)
: selects CGRAM data write mode and specifies
CGRAM address.
X0 X1 X2 X3
0
1
0
*
(Ex: Specifies CGRAM address 00H.)
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
2nd byte
(2nd)
: specifies 1st column data
(written into CGRAM address 00H)
C0 C5 C10C15C20C25C30
*
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
3rd byte
(3rd)
: specifies 2nd column data
(written into CGRAM address 00H)
C1 C6 C11C16C21C26C31
*
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
4th byte
(4th)
: specifies 3rd column data
(written into CGRAM address 00H)
C2 C7 C12C17C22C27C32
*
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
5th byte
(5th)
: specifies 4th column data
(written into CGRAM address 00H)
C3 C8 C13C18C23C28C33
*
LSB
MSB
B0 B1 B2 B3 B4 B5 B6 B7
6th byte
(6th)
: specifies 5th column data
(written into CGRAM address 00H)
C4 C9 C14C19C24C29C34
*
To specify character pattern data continuously to the next address, specify only character pattern data as follows.
The addresses of CGRAM are automatically incremented. Specification of an address is therefore unnecessary.
The 2nd to 6th byte (character pattern data) are regarded as one data item, so 300 ns is sufficient for tDOFF time
between bytes.
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