FEDL9205-03
1
Semiconductor
ML9205-01
FUNCTIONAL DESCRIPTION
Commands List
LSB
1st byte
MSB LSB
2nd byte
MSB
Command
B0
X0
B1
X1
B2
X2
B3
X3
B4
B5
1
B6
0
B7
0
B0
C0
C0
C1
C2
C3
C4
C0
B1
C1
C5
C6
C7
C8
C9
C1
B2
C2
B3
C3
B4
C4
B5
C5
B6
C6
B7
C7
*
1
2
DCRAM data write
CGRAM data write
ADRAM data write
X4
C10 C15 C20 C25 C30
C11 C16 C21 C26 C31
C12 C17 C22 C27 C32
C13 C18 C23 C28 C33
C14 C19 C24 C29 C34
2nd byte
3rd byte
4th byte
5th byte
6th byte
*
X0
X1
X2
X3
*
0
1
0
*
*
*
3
4
5
6
7
X0
P1
D0
K0
L
X1
P2
D1
K1
H
X2
P3
D2
K2
*
X3
P4
*
X4
*
1
0
1
0
1
1
0
0
1
1
0
1
1
1
1
C2
C3
*
*
*
*
General output port
set
*
: Don't care
Xn : Address specification for each RAM
Display duty set
*
Cn : Character code specification for each RAM
Pn : General output port status specification
Dn : Display duty specification
Number of digits
set
K3
*
*
All lights ON/OFF
Test mode
*
Kn : Number of digits specification
H
L
: All lights ON instruction
: All lights OFF instruction
When data is written to RAM (DCRAM, CGRAM, ADRAM) continuously, addresses are internally incremented
automatically. Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later bytes.
Note :
The test mode is used for inspection before shipment.
It is not a user function.
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