FEDL9092-01
OKI Semiconductor
ML9092-01/02/03/04
Instruction Code List (ML9092-04)
Instruction Code
Data
D4
Description
No.
Instruction
Fixed bit R/W
Register No.
D7 D6 D5 D4 D3 D2 D1 D0 D7
D6
D5
D3
S3
D2
S2
D1
S1
D0
Reads scan read timing bits (ST0 to ST2) and key scan
S0 data (S0 to S4) of the key scan register.
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
ST2 ST1 ST0
S4
D4
Key scan register read
Display data RAM write
Writes display data (D0 to D7) in the display data RAM
after setting the X address of Y address.
D7
D6
D6
–
D5
D3
D2
D1
D0
Reads display data (D0 to D7) from the display data RAM
after setting the X address of Y address.
1
2
Display data RAM read
X address register set
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
0
D7
–
D5
–
D4
–
D3
X3
D2
X2
D1
X1
D0
X0 Sets the X address (X0 to X3) of the display data RAM.
Y0 Sets the Y address (Y0 to Y3) of the display data RAM.
3
4
5
Y address register set
Port register A set
Port register B set
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
1
0
1
–
–
–
–
–
–
–
–
–
–
–
–
Y3
–
Y2
–
Y1
–
PTA0 Controls the output of the general-purpose port A (PTA0).
Controls the output of the general-purpose port B (PTB0
–
PTB2 PTB1 PTB0
to PTB2).
Sets the address increment X or Y direction (INC), display
data word length (WLS), key scan time (KT), common
driver shift direction (SHL), port control (PE), and display
duty (DTY0, DTY1).
8
Control register 1 set
1
1
0
0
1
0
0
0
INC WLS KT
SHL
–
PE DTY1 DTY0
Sets or releases standby mode and also sets display
STB DISP
ON/OFF (DISP).
9
A
B
C
Control register 2 set
Rotary encoder read
Contrast ADJ set
1
1
1
1
1
1
1
1
0
1
0
0
0
0
0
0
1
1
1
1
0
0
0
1
0
1
1
0
1
0
1
0
0
Q4
–
0
Q4
–
0
Q4
–
0
Q4
–
0
0
Reads the counter bits (Q1 to Q4) of the rotary encoder.
Q4
Q3
Q2
Q1
Sets contrast adjustment values with the contrast
adjustment bits (CT0 to CT3).
CT3 CT2 CT1 CT0
Sets the pulse width to be output from general-purpose
port B (PTB0) with the bits (PW00 to PW07) of PWM0.
PWM0 register set
PW07 PW06 PW05 PW04 PW03 PW02 PW01 PW00
PW17 PW16 PW15 PW14 PW13 PW12 PW11 PW10
Sets the pulse width to be output from general-purpose
port B (PTB1) with the bits (PW10 to PW17) of PWM1.
D
E
F
PWM1 register set
PWM2 register set
Test register set
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
0
1
1
1
0
1
Sets the pulse width to be output from general-purpose
port B (PTB2) with the bits (PW20 to PW27) of PWM2.
PW27 PW26 PW25 PW24 PW23 PW22 PW21 PW20
Test instruction exclusively used by manufacturer (T1 to
T5). Customers must not use this instruction.
–
–
–
T5
T4
T3
T2
T1
Notes:
R/W
: Read/write select bit
1:Read, 0: Write
ST0 to ST2
S0 to S4
D0 to D7
X0 to X3
Y0 to Y3
PTA0
: Key scan read count display bits
: Key scan data
: Write or read data of the display data RAM
: X addresses of the display data RAM
: Y addresses of the display data RAM
: Port A data
PE
: Port enable/disable select bit 1: All ports enable
0: All ports go into high impedance for output
: Display duty select bits (1/8, 1/9, 1/10)
DTY0, DTY1
STB
: Standby mode/normal mode select bit
1: Standby mode, 0: Normal mode
1: Display ON, 0: Display OFF
DISP
Q1 to Q4
CT0 to CT3
PW00 to PW07 : PWM0 setting bits
PW10 to PW17 : PWM1 setting bits
PW20 to PW2
T1 to T5
: Display ON/OFF select bit
PTB0 to PTB2 : Port B output control
1: Output enable, 0: Fixed at “L”
: Rotary encoder switch count bits (2’s complement)
: Contrast adjustment bit
INC
WLS
KT
: Display data RAM address increment. 1: X direction, 0: Y direction
: Word length select bit
: Key scan period select bit
: Common driver shift direction select bit
1: 6 bits, 0: 8 bits
1: 10 ms, 0: 0.5 ms
SHL
: PWM2 setting bits
: Bits for test instruction. Customers should not access these bits.
1: COM10→COM1, 0: COM1→COM10
–
: Don’t Care
33/66
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