FEDL9092-01
OKI Semiconductor
ML9092-01/02/03/04
FUNCTIONAL DESCRIPTIONS
Pin Functional Descriptions
ML9092-01
Function
Pin
63
Symbol
Type
I
Description
CS
Chip select signal input pin
Shift clock signal input pin. This pin is
connected to the Schmitt circuit internally.
64
65
CP
I
CPU interface
Serial data signal I/O pin. This pin is
connected to the Schmitt circuit internally.
DI/O
I/O
Key scan read and rotary encoder read
READY signal output pin.
66
77
KREQ
OSC1
O
I
Connect external resistors with this pin.
This pin is connected to the Schmitt circuit
internally.
Oscillation
78
67
OSC2
O
I
If using an external clock, input it from the
OSC1 pin and leave the OSC2 pin open.
Reset input. Initial settings can be
established by applying a “L” level to this
pin. This pin is connected to the Schmitt
circuit internally.
RESET
Control signal
Input pin for switching between key
scanning and ports C and D
80
79
KPS
I
I
Test input pin. This pin is connected to the
TEST
VSS pin.
Input pins that detect status of key
switches/port D output pins. When used
as input pins, these pins are connected to
the Schmitt circuit internally.
62–58
C0/D0–C4/D4
I/O
Switch signal
Key switch scan signal output pins/port C
output pins
57–53
51, 52
R0/C0–R4/C4
A, B
O
I
Rotary encoder signal input pins.
These pins are connected to the Schmitt
circuit internally.
81
84–82
50–1
100–95
94–85
76
PA0
O
O
Port A output pin
Port B output pins
Port output
PB0–PB2
SEG1–SEG56
O
LCD segment driver output pins
LCD driver output
COM1–COM10
O
—
—
LCD common driver output pins
Logic power supply pin
GND pin
VDD
VSS
68
Voltage doubler reference voltage input
pin
75
VIN
—
—
Power supply
Pins to connect a capacitor for voltage
doubler
74, 73
VC1+, VS1–
72
71, 69
70
VOUT
V0, V2
NC
—
—
—
Voltage doubler output pin
LCD bias pins
Should be left open.
11/66
OKI [ OKI ELECTRONIC COMPONETS ]
