FEDL9092-01
OKI Semiconductor
ML9092-01/02/03/04
Display Screen and Memory Address Allocation
The ML9092-01/02/03/04 has an internal display data RAM (60 bits by 10 bits) of a bitmap type.
The allocation of memory addresses varies according to the selected word length (6 bits or 8 bits) as shown in
Figure 10: 0 to 7 for selection of 8 bits per word or 0 to 9 for selection of 6 bits per word.
The X address 7 in the 6-bits/word mode has four display memory bits. The four bits (D7 to D4) starting from bit
D7 of the display data register are written in memory and the other bits (D3 to D0) are ignored.
Address Allocation in the 8-bits/word mode
Address Allocation in the 6-bits/word mode
(X address)
(X address)
0
1
2
7
0
1
2
9
0
1
0
1
(D7)
(D0)
(D5)
(D7)
(D4)
(4 bits)
(D0)
(6 bits)
(8 bits)
9
9
Figure 10 Display Memory Addresses
In the 8-bits/word mode, data to be displayed is written in display memory with the D7 data of the display data
register at address (Xn, Yn) and the D0 data at address (Xn + 7, Yn). Similarly, In the 6-bits/word mode, data to be
displayed is written in display memory with the D5 data of the display data register at address (Xn, Yn) and the D0
data at address (Xn + 5, Yn). See Figure 11.
Data “1” in display memory represents turning on the corresponding display segment and data “0” in display
memory represents turning off the corresponding display segment.
Note: In the ML9092-01, the X address range in the 8-bits/mode will be 0 to 6
Common
output
1
0
1
1
1
0
1
0
0
Y line
Y0
(COM1)
(COM2)
Y1
(D7)
(D5)
(D0) For 8 bits per word
(D0) For 6 bits per word
RAM for 60 dots by 10 dots display
(COM10)
Y9
Figure 11 Display Screen Bit Allocation and Memory Addresses
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