FEDL9092-01
OKI Semiconductor
ML9092-01/02/03/04
• VS1–
Negative connection pin for the capacitor for the voltage doubler. Connect a 4.7 µF (±30%) capacitor between this
pin and the VC1+ pin. When the voltage doubler is not used, leave this pin unconnected (open).
This pin is provided for the ML9092-01/02.
• VC1+
Positive connection pin for the capacitor for the voltage doubler. Connect a 4.7 µF (±30%) capacitor between this
pin and the VS1– pin. When the voltage doubler is not used, leave this pin unconnected (open).
This pin is provided for the ML9092-01/02.
• VOUT
A voltage twice that which is input to the VIN pin is output to this pin. Connect a 4.7 µF capacitor between this pin
and the VSS pin. When the internal voltage doubler is not used, input the specified voltage to this pin from the
outside. When built-in contrast adjustment (electronic volume) is used, leave the connection between this pin and
the V0 pin open. The LCD drive voltage will be output from the V0 pin according to the contrast adjustment value.
When built-in contrast adjustment is not used, connect this pin with the V0 pin.
This pin is provided for the ML9092-01/02.
• V0, V2
LCD bias pins. A bias dividing resistor is connected to these pins.
These pins are provided for the ML9092-01/02/04.
• VHIN
LCD drive high voltage power supply connection pin. When built-in contrast adjustment (electronic volume) is
used, input the LCD drive power supply voltage to this pin. The LCD drive voltage will be output from the V0 pin
according to the contrast adjustment value. When built-in contrast adjustment is not used, strap the VHIN pin and
V0 pin outside the IC, and input the LCD drive voltage into both pins.
This pin is provided for the ML9092-03/04.
• V0, V1, V2, V3
LCD bias pins. A bias dividing resistor is connected to these pins. When using a large-screen LCD, however,
input the LCD bias voltage from outside the IC to these pins.
This is applicable to the ML9092-03.
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